Year: 2023

500-mA-Rated Collector Current (Single Output) High-Voltage Outputs … 50 V Output Clamp Diodes Inputs Compatible With Various Types of Logic Relay-Driver Applications ULN2003AN are high-voltage, high-current Darlington transistor arrays. Each consists of seven npn Darlington pairs     that     feature     high-voltage     outputs with common-cathode clamp diodes for switching inductive loads. The collector-current rating of a single Darlington[...]

The TLC555CP is a monolithic timing circuitfabricated using the TI LinCMOS process. Thetimer is fully compatible with CMOS, TTL, andMOS logic and operates at frequencies up to2 MHz. Because of its high input impedance, thisdevice uses smaller timing capacitors than thoseused by the NE555. As a result, more accuratetime delays and oscillations are possible. Powerconsumption[...]

with low input bias and offset currents and fast slew rate. The low harmonic distortion and low noise make the TL072CP series ideallysuited for high-fidelity and audio preamplifier applications. Each amplifier features JFET inputs (for high inputimpedance) coupled with bipolar output stages integrated on a single monolithic chip. The C-suffix devices are characterized for operation[...]

SN75176BP differential bus transceivers are integrated circuits designed for bidirectionaldata communication on multipoint bus transmission lines. They are designed for balanced transmission linesand meet ANSI Standards TIA/EIA-422-B and TIA/EIA-485-A and ITU Recommendations V.11 and X.27.SN75176BP combine a 3-state differential line driver and a differential input line receiver,both of which operate from a single 5-V power[...]

Wide Operating Voltage Range of 2 V to 6 VHigh-Current Outputs Drive Up To15 LSTTL Loads3-State Outputs Drive Bus Lines or BufferMemory Address Registers Low Power Consumption, 80-μA Max ICCTypical tpd = 11 ns±6-mA Output Drive at 5 VLow Input Current of 1 μA Max These octal buffers and line drivers are designed specifically to[...]

The ’HC138 devices are designed to be used in high-performance memory-decoding or data routing    applications   requiring very short propagation  delay  times.  In  high-performance memory systems, these decoders can be used to minimize the effects of system decoding. When employed with high-speed memories utilizing a fast enable circuit, the delay times of these decoders and the[...]